SiC MOSFET Technology Advantages

BYD SiC MOSFET power modules offer significant advantages over traditional silicon IGBTs: (1) Switching loss reduced by 90%, supporting 100kHz+ switching frequency. (2) Small on-resistance temperature coefficient, less loss increase at high temperatures. (3) No tail current, fast turn-off. (4) Maximum junction temperature 175°C, more flexible thermal design. (5) System efficiency improvement of 1-3%, power density improvement of 3-5x. These advantages make SiC ideal for high-efficiency applications such as EV charging and solar inverters.

SiC Module Selection Points

BYD SiC MOSFET module selection considerations: (1) Voltage rating: 1200V modules suitable for 800V systems and EV charging stations. (2) Current rating: Select based on RMS current and thermal limits, common models include BM300F12B34U2 (300A), BM600F12B34U2 (400A), BM840F12B34U2 (500A), BM950F12B34U2 (550A). (3) RDS(on): Affects conduction loss, increases approximately 1.5-2x at high temperatures. (4) Package: 34mm standard package, compatible with IGBT. (5) Thermal resistance: SiC has lower thermal resistance, relatively relaxed cooling requirements.

SiC vs IGBT Comparison Analysis

SiC MOSFET vs IGBT detailed comparison: (1) Efficiency: SiC solution is 1-3% higher, saving significant electricity costs in charging station applications. (2) Switching frequency: SiC supports 50-100kHz, IGBT typically 10-20kHz. (3) System size: SiC solution reduces volume by 30-50%. (4) Cost: SiC module cost is higher, but system-level cost gap narrows. (5) Reliability: SiC's high temperature performance and radiation resistance are superior. Recommendation: High efficiency, high power density, high temperature applications prioritize SiC; cost-sensitive applications choose IGBT.

Gate Drive Design Essentials

SiC MOSFET gate drive design keys: (1) Drive voltage: +18V turn-on (reduces RDS(on)), -4V turn-off (prevents dv/dt false turn-on). (2) Gate resistor: 2-8Ω, affects switching speed and EMI. (3) Drive current: Peak current 3-6A, ensures fast charge/discharge. (4) CMTI: >100V/ns, adapts to SiC's high dv/dt. (5) Undervoltage lockout: UVLO threshold must be appropriate to prevent RDS(on) increase. Recommend dedicated SiC gate drivers such as STGAP2SiC, UCC21710, etc.

PCB Layout Design Guide

SiC MOSFET PCB layout key points: (1) Minimize gate loop inductance: <10nH, use Kelvin connection. (2) Minimize power loop inductance: reduces parasitic oscillation and EMI. (3) Decoupling capacitors placed close to module pins. (4) Separate gate drive from power loop to avoid crosstalk. (5) Consider high dv/dt (>50V/ns) impact on adjacent circuits. (6) Use shielding and filtering to suppress EMI. Good PCB layout is crucial for SiC performance.