EMC Basics and Standards

Power electronics EMC requirements: (1) Conducted Emissions (CE): 150kHz-30MHz, interference conducted through power lines. (2) Radiated Emissions (RE): 30MHz-1GHz, interference radiated through space. (3) Electrostatic Discharge (ESD): ±4kV contact discharge, ±8kV air discharge. (4) Electrical Fast Transient (EFT): ±2kV power lines, ±1kV signal lines. (5) Surge: ±1kV/±2kV line-to-line/line-to-ground. Automotive applications must also meet CISPR 25, ISO 11452 and other standards. EMC design should be considered early in product design, late-stage correction costs are high.

Input Filter Design

Input filter design points: (1) Common-mode filtering: Use common-mode inductors to suppress common-mode noise (L, N lines to ground in-phase noise). (2) Differential-mode filtering: Use X capacitors and differential-mode inductors to suppress differential-mode noise (between L, N lines anti-phase noise). (3) Filter cutoff frequency: Select based on switching frequency, typically <1/10 switching frequency. (4) Damping design: Prevent LC resonance, can parallel RC damping network. (5) Layout: Place filter close to input port, capacitors close to power devices. Typical design: Common-mode inductor 1-10mH, X capacitor 0.1-1μF, Y capacitor 2200pF-4700pF.

PCB Layout EMC Optimization

PCB layout EMC design principles: (1) Minimize power loop: Reduce di/dt loop area, lower radiation. (2) Minimize gate loop: Reduce gate loop inductance, avoid oscillation. (3) Layered design: Separate power layer, ground layer, signal layer, use multi-layer board. (4) Decoupling capacitors: Place close to power device pins, reduce high-frequency loop. (5) Grounding design: Single-point grounding or multi-point grounding, avoid ground loops. (6) Keep sensitive signals away from power traces: Control signals, sampling signals away from high dv/dt, di/dt areas. Good PCB layout can significantly reduce EMI.

SiC High-Frequency EMI Suppression

SiC MOSFET high-frequency EMI characteristics and suppression: (1) High dv/dt (>50V/ns) and high di/dt are main EMI sources. (2) Gate resistor optimization: Appropriately increasing Rg can slow switching speed, reduce EMI, but increases loss. (3) RC snubber circuits: Parallel RC across switch to absorb high-frequency oscillation. (4) Ferrite beads: Series magnetic beads in gate loop to suppress high-frequency ringing. (5) Common-mode filtering: Add common-mode inductors at output to suppress common-mode noise. (6) Shielding: Use metal shield to isolate radiation source. Need to find balance between efficiency and EMI.

Shielding and Grounding Techniques

Shielding and grounding design: (1) Electric field shielding: Use high conductivity materials (copper, aluminum) to suppress capacitive coupling. (2) Magnetic field shielding: Use high permeability materials (mu-metal) to suppress inductive coupling. (3) Shield design: Completely cover radiation source, conductive connection at seams, use conductive gaskets if necessary. (4) Grounding methods: Single-point grounding (low frequency), multi-point grounding (high frequency), hybrid grounding. (5) Ground impedance: Minimize ground impedance, use wide copper or ground plane. (6) Heatsink grounding: Heatsinks typically connect to DC bus midpoint or safety ground to avoid antenna effect.